1. Field of the Invention
The present invention relates to a method and device for ultrawideband frequency-tracking and, more particularly, to a multi-band frequency-tracking method and device for use in USB peripheral.
2. The Related Art
USB (Universal Serial Bus) ports of a computer are used to connect many USB peripherals, including USB keyboard, USB mouse, USB card reader, USB flash drive, external USB hard disk, USB printer, and USB scanner. The USB ports provide convenience to the users. The transmission speed of USB has also evolved from the 12 Mbps of USB 1.1 up to 480 Mbps of USB2.0.
According to the transmission specification of the USB, USB 1.1 can support low speed peripherals, such as USB keyboard, USB mouse, and USB joy stick, whose transmission speed is 1.5 Mbps with the tolerance of 1.5%, and the full speed peripherals, such as USB flash drive, USB printer, and USB scanner, whose transmission speed is 12 Mbps with a tolerance of 0.25%. On the other hand, USB2.0 is capable of supporting high speed peripherals, whose transmission speed is as high as 480 Mbps. USB 2.0 is downward compatible with USB1.1, therefore, USB2.0 can support low speed, full speed and high speed peripherals.
FIG. 1 shows a block diagram of a USB low speed controller according to the prior art. The USB low speed controller 100 requires an external precise crystal oscillator 120, or a ceramic resonator, and external large-capacitance capacitors C1, and C2, to cooperate with its internal auxiliary resonant circuit 101 to generate the CLK clock signal for operating the internal clock extracting circuit 102 of the low speed controller 100. For example, the CLK clock frequency is 6 MHz, four times oversampling frequency. Alternatively, the low speed controller 100 can utilize the crystal oscillator to generate a 1.5 MHz clock frequency, and utilize a phase lock loop (PLL) to sample the frequency with internal multiple of the clock frequency. The transceiver 101 couples with the USB port of the host. The transceiver 104 transceives the differential signal D+/D−, also called a data flow. When the transceiver 104 receives the differential signal D+/D− from the host, it outputs the differential signal RXD+/RXD− and NRZI-coded RXD data signal to the serial interface engine (SIE) 106. The NRZI-coded RXD data signals are also transmitted to the clock extracting circuit 102. The clock extracting circuit 102 utilizes the CLK clock to oversample the RXD data, and extract the 1.5 MHz SIECLK clock information hidden in the differential signal for the SIE 106. The SIE 106 utilizes the SIECLK clock to retrieve the digital signal information from the RXD data signals. Otherwise, the transceiver 104 receives the differential signal TXD+/TDX− from the SIE 106, and transmits the same to the host. The SIE 106 controls the operation of the transceiver 104. The external crystal oscillator or the external ceramic resonator is an additional expense for the USB mouse manufacturers.
FIG. 2 shows a typical oscillator circuit utilizing an inverter buffer 200 and a feedback resistor R, and utilizing a current control, voltage control, or capacitance control trimming circuit 220 to properly adjust the oscillating frequency. For example, a plurality of capacitors C, 2C, 4C, 8C, 16C and semiconductor switches are utilized to form different combinations in order to generate suitable oscillating signal S with the frequency f. A trimming circuit 220 is required to fine tune the oscillating frequency. In this circuit, trimming circuit 220 is an adjustable capacitor. Persons skilled in semiconductor manufacturing should understand that the resistor and the capacitors of the circuit, while integrated into IC, depend on the doping density, process drift and the temperature during the manufacturing process. The drift of the oscillating frequency f can be as high as 50%. A frequency drift of this magnitude usually requires a more expensive and time-consuming method, such as, laser trim, fuse, or one time programmable (OTP), to tune it back to within the trackable and lockable frequency range, for example, ±5% or ±10%, so that it is possible to track the correct frequency.
The speed of the USB devices can be determined by the termination status. Taking USB low speed device and USB full speed device as an example, as shown in FIG. 3 of the attached drawings, in accordance with USB specification, the voltages at the D+ and D− lines of the host side USB controller 310, called down stream USB controller, are pulled down to ground through the pull-down resistors Rpd, and the voltage of the D− line of the device side USB controller 320, called up stream USB controller, is pulled up to V33 (V33=3.3V) through the pull-up resistor Rpu, where Rpd and Rpu have the resistance of 15 KOhm±5% and 1.5 KOhm±15%, respectively. The host can therefore detect that the device is a USB low speed device. On the other hand, the voltages at the D+ and D− lines of the host side USB controller 310, called down stream USB controller, are pulled down to ground through the pull-down resistors Rpd, and the voltage of the D+ line of the device side USB controller 320, called up stream USB controller, is pulled up to V33 (V33=3.3V) through the pull-up resistor Rpu, where Rpd and Rpu have the resistance of 15 KOhm±5% and 1.5 KOhm±5%, respectively. The host can therefore detect that the device is a USB full speed device.
For USB2.0, the host side USB controller preferably supports low speed, full speed and high speed transmission modes, and the device side USB controller at least support full speed and high speed transmission modes. When both USB controllers are first connected, the USB transmission mode is determined to be low speed if the host detects that the device USB is low speed. As shown in FIG. 4, if the host detects that the device USB is in the USB full speed termination status, the host will further detect if the K-J-K-J-K-J sequence shows up on the D+, and D− lines at the device end for more than 1 ms. If so, the pin of the general purpose I/O (GPIO) and switch SW are used to disconnect the pull-up resistor Rpu from the D+ line. A so-called USB high speed transmission mode is formed.
The USB specification includes several types of packets to facilitate all types of transactions. A token packet comprises a PID field, an ADDR field, and ENDP field, and a CRC4 field. The typical width of the PID field is 8 bits, for indicating the packet format, such as, IN, OUT, or SETUP. The ADDR field and the ENDP field are for indicating the endpoint address. The CRC5 field is a 5-bit field for cyclic redundant code. The host sends token packets to inform the endpoint whether a read or a write transaction is performed. If it is a write transaction, the host will send the data packets to the endpoint, otherwise, the endpoint will send to the host.